#ifndef _PCIE_PORTS_H
#define _PCIE_PORTS_H
/*
  author Sylvain Bertrand <digital.ragnarok@gmail.com>
  Protected by GNU Affero GPL v3 with some exceptions.
  See README at root of alga tree.
*/

#define PCIE_LC_TRAINING_CTL				0xa1
#define		LC_POINT_7_PLUS_EN				(1 << 6)
#define PCIE_LC_LINK_WIDTH_CTL				0xa2 
#define		LC_LINK_WIDTH_SHIFT				0
#define		LC_LINK_WIDTH_MASK				0x7
#define		LC_LINK_WIDTH_X0				0
#define		LC_LINK_WIDTH_X1				1
#define		LC_LINK_WIDTH_X2				2
#define		LC_LINK_WIDTH_X4				3
#define		LC_LINK_WIDTH_X8				4
#define		LC_LINK_WIDTH_X16				6
#define		LC_LINK_WIDTH_RD_SHIFT				4
#define		LC_LINK_WIDTH_RD_MASK				0x70
#define		LC_RECFG_ARC_MISSING_ESCAPE			(1 << 7)
#define		LC_RECFG_NOW					(1 << 8)
#define		LC_RENEGOTIATION_SUPPORT			(1 << 9)
#define		LC_RENEGOTIATE_EN				(1 << 10)
#define		LC_SHORT_RECFG_EN				(1 << 11)
#define		LC_UPCONFIGURE_SUPPORT				(1 << 12)
#define		LC_UPCONFIGURE_DIS				(1 << 13)
#define PCIE_LC_SPEED_CTL				0xa4
#define		LC_GEN2_EN_STRAP				(1 << 0)
#define		LC_TARGET_LINK_SPEED_OVERRIDE_EN		(1 << 1)
#define		LC_FORCE_EN_HW_SPEED_CHANGE			(1 << 5)
#define		LC_FORCE_DIS_HW_SPEED_CHANGE			(1 << 6)
#define		LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_MASK		(0x3 << 8)
#define		LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_SHIFT		3
#define		LC_CURRENT_DATA_RATE				(1 << 11)
#define		LC_VOLTAGE_TIMER_SEL_MASK			(0xf << 14)
#define		LC_CLR_FAILED_SPD_CHANGE_CNT			(1 << 21)
#define		LC_OTHER_SIDE_EVER_SENT_GEN2			(1 << 23)
#define		LC_OTHER_SIDE_SUPPORTS_GEN2			(1 << 24)
#define LINK_CTL2					0x88 /* F0 */
#define		TARGET_LINK_SPEED_MASK				(0xf << 0)
#define		SELECTABLE_DEEMPHASIS				(1 << 6)

#endif /* _PCIE_PORTS_H */
